1. Field of the Invention
The present invention relates to a plasma display apparatus and a method of driving the same, and more particularly, to a plasma display apparatus for controlling on/off of a switch comprised in an energy recovery unit for recovering a voltage from a panel capacitor to supply the voltage again to apply a bias voltage for an address period and a method of driving the same.
2. Description of the Background Art
In general, a plasma display panel (PDP) emits light from a phosphor by vacuum ultraviolet (UV) rays generated when a gas such as He+Xe, Ne+Xe, or He+Ne+Xe is discharged to display an image.
FIG. 1 is a perspective view illustrating the structure of a conventional PDP.
First, scan electrodes 1 and sustain electrodes 2, a dielectric layer 13 that covers the scan electrodes 1 and the sustain electrodes 2, and a protective layer 14 that covers the dielectric layer 13 are formed on a front substrate A that forms the PDP.
The scan electrodes 1 and the sustain electrodes 2 are composed of transparent electrodes 1a and 2a formed of transparent electrode material (ITO) so that visible rays are transmitted to the front of the PDP and metal bus electrodes 1b and 2b for compensating for the surface resistance of the transparent electrodes 1a and 2a. 
Address electrodes 6 are formed to intersect the scan electrodes 1 and the sustain electrodes 2 and a dielectric layer 8 that covers the address electrodes 6 is formed in the rear substrate B.
Barrier ribs 7 for partitioning discharge spaces are formed in the dielectric layer 8 and a phosphor 9 excited by the UV rays to emit light is formed on the side of the barrier ribs 7 and on the dielectric layer 8 to emit one of red, green, and blue visible rays.
The PDP having the above-described structure is driven so that one frame is divided into a plurality of sub-fields having different number of times of emission. For example, when an image is displayed by 256 gray levels, one frame corresponding to 1/60 second is divided into 8 sub-fields and each sub-field is divided into a reset period R for initializing a discharge cell, an address period A for selecting a discharge cell, and a sustain period S for realizing gray levels in accordance with the number of times of discharge.
FIG. 2 illustrates driving waveforms supplied to the conventional PDP. As illustrated in FIG. 2, the sub-field illustrated in FIG. 2 is divided into the reset period R, the address period A, and the sustain period S.
In the reset period R, a set-up signal R_up that rises in the form of a ramp is applied to the scan electrodes Y so that wall charges are accumulated in the discharge cell and a set-down signal R_dn that falls to a negative specific voltage level in the form of a ramp is applied so that some of the wall charges excessively formed in the discharge cell is erased.
In the address period A, a scan pulse scp that sustains a scan bias voltage to fall to a negative voltage level is applied. At this time, a data pulse dp that rises to a positive voltage level is applied to the address electrodes X in synchronization with the scan pulse scp. An address discharge is generated by difference in voltage between the scan pulse scp applied to the scan electrodes Y and the data pulse dp applied to the address electrodes X.
In the sustain period S, sustain pulses having a sustain voltage Vs level are alternately applied to the scan electrodes Y and the sustain electrodes Z so that a sustain discharge is generated.
As illustrated in FIG. 2, a positive bias voltage Vzb smaller than the sustain voltage Vs is applied to the sustain electrodes Z in the period where the set-down signal R-dn is applied to the scan electrodes Y and the address period A to reduce difference in voltage between the scan electrodes Y and the sustain electrodes Z so that erroneous discharge is not generated.
In order to apply the positive bias voltage Vzb having such a voltage level, the sustain driving circuit illustrated in FIG. 3 is comprised.
The conventional sustain driving circuit comprises an external voltage source Vzb for supplying the bias voltage Vzb and a switching device Fzb connected to the external voltage source so that electricity flows through the switching device Fzb by the control of a timing controller, the switching device Fzb for applying the bias voltage to the sustain electrodes.
The sustain driving circuit comprises an energy recovery unit 10 for recovering the energy stored in a panel capacitor Cp to supply the energy for the sustain period S and a sustain signal applying unit 20 for supplying the sustain pulses for the sustain period S.
At this time, electricity flows through the switching device Fzb when the set-down signal R_dn starts to be applied to the scan electrodes Y so that the bias voltage Vzb is applied and flow of electricity to the switching device Fzb is stopped when the address period A is terminated so that the application of the bias voltage is stopped.
Therefore, in order to apply the bias voltage Vzb in the period where the set-down signal R_dn is applied and in the address period A, the conventional sustain driving circuit must comprise the additional external voltage source Vzb and the switching device Fzb for applying the bias voltage. As a result, the circuit becomes complicated and manufacturing expenses thereof increase.